Please read this page from the main YASEP interface
Configure the core

This page generates definition files for the VHDL code. The original definitions are located in the files of the core-js directory.
The rest of the VHDL code is in its own directory. See also the interactive opcode map.

The configuration is stored in a "profile" that corresponds to a particular YASEP implementation. You can choose from the following existing profiles :


You can examine and modify the current profile

Save as : not initialised

Description : not initialised

Datapath width :   16 bits   32 bits

Multiplier : none   8×8 bits   16×16 bits

Pipeline : disabled   enabled

Condition as a bit of R1 : disabled   enabled

Enabled opcodes :